AIX Hardware Year 2000
compliance
|
| Product code | Name | Year 2000 ready |
| CPKG128-0000 | Dual CPU: PPC604 @112MHZ->604 @150MHZ |  |
| CPOG005-0000 | Dual CPU: PPC604 @150MHZ, 4MB Level 2 cache | |
| CPOG006-0000 | 2Dual CPU: PPC604 @150MHZ, 4MB Level 2 cache | |
| CPUG007-0000 | Dual CPU: PPC 604 - @ 112MHZ | |
| CPUG008-0000 | Dual CPU: PPC 604 - @ 112MHZ | |
| CPUG010-0000 | Dual CPU: PPC604 power kit | |
| CPUG011-0000 | Dual CPU: PPC604 @112MHZ, 2MB Level 2 cache | |
| CPUG015-0000 | Dual CPU: PPC604 @150MH, 4MB Level 2 cache | |
Index
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Notice
Bull is making every effort to provide accurate and explicit
information on the Year 2000 readiness of its products. The information on this page
reflects the current results of our compliance tests and may be updated as testing
continues. Please see the Bull Year 2000 Compliance Overview for
an explanation of the terms used and our commitments.
Year 2000 Information and Readiness Disclosure Statements
Information contained on Bull past and present
Year 2000 Internet Website pages regarding products and services offered by Bull are
"Year 2000 Readiness Disclosures" as defined by the Year 2000 Information and
Readiness Disclosure Act of 1998, (The United States of America's Public Law 105-271, 112
Stat. 2386) enacted on October 19, 1998. Bull Year 2000 Internet website pages have been
and will continue to be our primary mechanism for communicating year 2000 information.
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